An analytical source-and-drain series resistance model of quarter micron MOSFETs and its influence on circuit simulation
نویسندگان
چکیده
An analytical model to describe the bias dependent series resistances and of LDD MOSFETs down to quarter micron and below is introduced. Comparing measurement and simulation results of CMOS ring oscillators it has been found that for low voltage applications ( V) an incorrect description of and can cause a simulation error of up to 30 % in the delay time of CMOS inverters.
منابع مشابه
A Non-Linear Description of the Bias Dependent Parasitic Resistances of Quarter Micron MOSFETs
A new model description for source and drain resistances of LDD devices is proposed. It includes the dependence on the gate, bulk and drain bias. Measurements on a 0.25μm gate length device show excellent agreement with circuit simulation.
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